Intel's FPGA+Xeon for Data Streaming
This past week, Intel announced a future Xeon would have an FPGA integrated on the chip, and still plug into a standard CPU socket.
This was reported around the various blogs and news outlets, but little attention to what it could actually be used for. In the popular press, FPGA seems to be thought of as an odd cousin to GPUs, sometimes useful for BitCoin mining and cracking encryption.
FPGAs have been around for two decades, and their initial application was for continuous digital signal processing. In hindsight, we can retroactively label this to be a "data streaming" application.
Later, Wall Street adopted FPGAs for High-Frequency Trading, another data streaming application.
But as more companies adopt Big Data and Data Science, they will then need to adopt data streaming, and thus need to leverage high-powered computing power such as FPGa's. Why? Because every Big Data project soon turns into a Data Streaming project. As soon as valuable insights are delivered based upon a "data lake" -- a static "Hadump" of a company's staling data -- the consumers of those insights -- managers, vice presidents, marketing personnel, system administratos -- request "more up to date" data. After a couple of iterations, "up to date" means "up to the second".
FPGAs are well-suited for data streaming due to the high number of parallel data lines, and due to the ease and speed with which they handle implementing a small, well-defined algorithm and data flow.
And because FPGAs are programmable, having an FPGA on a Xeon means software developers won't have to, for example, wait for the next iteration of SIMD instructions to process data in parallel. SIMD started out in the early 90's with MMX, then SSE in various iterations up to SSE 3.x, and now we are into AVX and AVX2, which has 256-bit wide registers. AVX-512 is due out in 2015, first in the Xeon Phi processor that Intel uses for its high-performance computing cards (to compete against GPGPUs from NVidia and AMD). In the past, if a software developer wanted a new SIMD instruction, it would involve begging Intel and waiting several years for a new Intel processor to be available to the public. An example would be the AES Instruction Set subset of the Intel SIMD instructions, which are useful only for encryption algorithms. Now with FPGA, software developers can develop custom parallel data flows instantaneously through software control.
But for data streaming applications you don't necessarily have to wait for the Intel Xeon with FPGA to become available. This coming Wednesday, June 25, 2014, Dr. Ron Indeck, president of VelociData, provider of FPGA and GPU solutions for Data Streaming, will be presenting Big Data Business Advantage with GPUs and FPGAs for Real-time Ingest Processing.